This relates to electronic packages that contain an integrated circuit (IC) typically fabricated on a semiconductor die. The package protects the IC from the environment and provides I/O interfaces for the IC to communicate with other circuits.
FIG. 1 is a cross-sectional view of a prior art BGA package including a substrate 100 and a semiconductor die 120 on the surface of the substrate 100. The semiconductor die carries an electronic circuit, e.g., a programmable logic device (PLD). The substrate includes a multitude of conductive paths running from a first array of solder joints 130 on one side of the substrate to a second array of solder joints 160 on the other side of the substrate. The first array of solder joints 130 is formed out of an array of solder balls located between the semiconductor die 120 and the substrate 100 after solder reflowing in a high temperature environment, that extends the electronic circuit's I/O structure from the semiconductor die 120 to the substrate 100. An underfill layer 140 is injected into the space between the die 120 and the substrate 100 to prevent or reduce stress concentration at the solder joints. An encapsulant layer 150 may be deployed on the substrate 100 and the semiconductor die 120, further insulating the electronic circuit from the environment. The second array of solder joints 160 is attached to an array of bonding pads 170 on the bottom side of the substrate 100, each solder joint having an associated conductive path in the substrate 100 that connects it to a solder joint on the top side of the substrate 100. A heat spreader 180 may be positioned on top of the encapsulant layer 150 to dissipate the heat generated by the electronic circuit inside the BGA package. In a typical application, multiple BGA packages like the one shown in FIG. 1, each including an electronic circuit designed for certain functions, are attached to a printed wiring board 190 by reflowing the attached solder balls into solder joints in a high temperature environment.
It has been observed that the reliability of a BGA package in an electronic application is significantly limited by the package's board-level reliability, which, in turn, depends on the condition of the connections between the solder joints 160 and the bonding pads 170. FIG. 2A is an enlarged cross-sectional view of a prior art bonding pad structure 200 at the bottom side of a substrate 205 before a solder joint is formed on its surface. The bonding pad structure 200 includes a copper pad 210 that is attached to the bottom side of the substrate 205 through, e.g., copper plating, and a layer of solder mask 240 covering a substantial portion of the bottom side. Note that the solder mask covering the central region of the copper pad 210 has been removed to expose a portion of the pad surface and the exposed pad surface is covered with a thin layer of solder paste 230 to protect it from oxidization. However, the thickness of the solder layer 230 is often non-uniform due to its surface tension, and there is little solder paste near the peripheral edge of the solder mask 233, allowing the copper pad 210 near the solder mask edge to be easily oxidized. As a result, when the solder joint is formed, the oxidized area on the copper pad may not be wetted by molten solder or the molten solder may withdraw from the oxidized area. In this case, even though the solder joint formed on the copper pad is initially connected to the substrate, the oxidized area on the copper pad may become a point at which a crack initiates. Such a crack can grow into a complete disconnection between the solder joint and the substrate during a board-level thermal cycling test.
FIG. 2B schematically illustrates a solder joint 250 that is disconnected from the conventional copper pad 210 by a fully-grown crack 237. The crack 237 starts at the oxidized area near the edge of the solder mask 240, extends into the central region of the copper pad 210 and finally disconnects the solder joint 250 from the copper pad 210, causing an electrical failure in the package which is very difficult to identify in a conventional electrical test.